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ISRO Previous Years Electronics Question Paper

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ISRO 2006 EC Paper:

Q 1. A series RLC circuit resonates at 1000 kHz. At frequency of 995 kHz, the circuit impedance is
(a) Resistive
(b) minimum
(c) Inductive
(d) capacitive

Q 2. If each stage had gain of 10dB and noise figure of 10dB, then the overall noise figure of two-stage cascade amplifier will be
(a) 10
(b)1.09
(c)1.0
(d)10.9

Q 3. In Sigma delta ADC, high bit accuracy is achieved by
(a) Over sampling and noise shaping
(b) Over sampling
(c) Under sampling
(d) None of the above

Q 4. A particular current is made up of two components: a 10 A deand a sinusoidal current of peak value of 1.414 A. The average value of the resultant current is
(a) Zero
(b) 24.14 A
(c)10 A
(d) 14.14 A

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Q 5.By doubling the sampling frequency
(a) Quantisation noise decreases by 3dB
(b) Quantisation noise density decreases by 3dB
(c) Quantisation noise increases by 3dB
(d) Quantisation noise density increases by 3dB

Q 6. A Pulse train with a frequency of 1MHz is counted using a modulo 1024 ripple-counter built with J-K flip-flops. For proper operation of the counter the maximum permissible propagation delay per flip-flop stage is
(a) 100 n sec
(b) 50 n sec
(c) 20 n sec
(d) 10 n sec

Q 7. The A/D converter used in a digital voltmeter could be (1) successive approximation type (2) Flash converter type (3) DuaJ slope converter type. The correct sequence in the increasing order of their conversion times is
(a) 1,2,3
(b) 2,1,3
(c) 3,2,1
(d) 3,1,2

Q 8. The resolution of a D/A converter is approximately 0.4% of its full-scale range. It is
(a) An 8-bit converter
(b) A 10-bit converter
(c) A 12 bit converter
(d) A 16 bit converter

Q 9. In a microprocessor, the resister which holds the address of the next instruction to be fetched is
(a) Accumulator
(b) Program counter
(c) Stack pointer
(d) Instructor register

Q 10. In microcomputer, WAIT states are used to
(a) Make the processor wait during a DMA operation
(b) Make the processor wait during a power interrupt processing
(c) Make the processor wait during a power shutdown
(d) Interface slow peripherals to the processor

Download Complete PDF: https://www.examsegg.com/downloads/isro-ec-question-paper-2006.pdf

2007 EC ISRO Question Paper:

Q 1. With fixed value capacitor C and variable voltage V across it, the energy stored in the capacitor is
(a)CV2
(b) 0.5CV2
(c) 2 CV2
(d) CV

Q 2. If the unit step response of a system is a unit impulse function, then the transfer function of such a system will be
(a) 1
(b) 1/s
(c) s
(d) 1/s2­

Q 3. A differential amplifier has a differential gain of 20,000. CMRR = 80 dB. The common mode gain is given by
(a) 2
(b) 1
(c) 1/2
(d) 0

Q 4. Two bulbs marked 200 watt – 250 volts and 100 watt-250 volts are joined in series to 250 volt supply. Power consumed in circuits is
(a) 33 watt
(b) 67 watt
(c) 100 watt
(d) 300 watt

Q 5. A half – adder can be constructed using two 2-input logic gates. One of them is an AND-gate, the other is
(a) OR
(b) NAND
(c) NOR
(d) EX-OR

Q 6. For one of the following conditions, clocked J-K flip-flop can be used as DIVIDE BY 2 circuit where the pulse train to be divided is applied at clock input.
(a) J = 1, K = 1 and the flip-flop should have active HIGH inputs
(b) J = 1, K = 1 and the flip-flop should have active LOW inputs
(c) J = 0, K = 0 and the flip-flop should have active HIGH inputs
(d) J = 1, K = 1 and the flip-flop should be a negative edge triggered one

Q 7. Number of comparators needed to build a 6-bit simultaneous A/D converter is
(a) 63
(b) 64
(c) 7
(d) 6

Q 8. The A/D converter used in a digital voltmeter could be (1) successive approximation type (2) Flash converter type (3) Dual slope converter type. The correct sequence in the increasing order of their conversion time taken is
(a) 1, 2, 3
(b) 2, 1, 3
(c) 3, 2, 1
(d) 3, 1, 2

Related: ISRO Accounts Practice Paper

Q 9. Which of the following binary number is equal to octal number 66.3
(a) 101101.100
(b) 1101111.111
(c) 111111.1111
(d) 110110.011

Q 10. A 4-bit presetable UP counter has preset input 0101. The preset operation takes place as soon as the counter reaches 1111. The modulus of the counter is
(a) 5
(b) 10
(c) 11
(d) 15

PDF Question Paper Download: https://www.examsegg.com/downloads/isro-ec-question-paper-2007.pdf

ISRO 2008 Question Paper Electronics

Q 1. Where does the operating point of a class-B power amplifier lie?
(a) At the middle of a.c load line
(b) Approximately at collector cut-off on both the d.c and a.c load lines
(c) Inside the collector cut-off region on a.c load time
(d) At the middle point of d.c load line

Q 2. Compared to field effect photo transistors, bipolar photo transistors are
(a) More sensitive and faster
(b) Less sensitive and slower
(c) More sensitive and slower
(d) Less sensitive and faster

Q 3. The output V-I characteristics of an enhancement type MOSFET has
(a) Only an ohmic region
(b) Only a saturation region
(c) An ohmic region at low voltage value followed by a saturation region at higher voltages
(d) An ohmic region at large voltage values preceded by a saturation region at lower voltages

Q 4. The following transistor configuration has the highest input impedance
(a) CC
(b) CE
(c) CB
(d) All of the above

Q 5. The advantage of write (copy) back data cache organization over write through organization is
(a) Main memory consistency
(b) Write allocate on write miss
(c) Less memory bandwidth
(d) Higher capacity requirement

Q 6. E2PROM storage element is
(a) Cross – coupled latch
(b) Isolated gate transistor
(c) Capacitor
(d) Flip flop

Q 7. The 8 bit DAC produces 1.0 V for a digital input of 00110010. What is the largest output it can produce?
(a) 5V
(b) -5V
(c) 5.5V
(d) 5.10 V

Q 8. The fastest ADC among the following is
(a) Successive approximation type
(b) Dual slope type
(c) Sigma-Delta ADC
(d) Flash converter

Q 9. Odd parity generator uses…………logic
(a) XNOR
(b) XOR
(c) Sequential
(d) OR

Q 10. Which type of memory has fast erase and write times
(a) EPROM
(b) EEPROM
(c) Flash memory
(d) None of these

ISRO 2008 Paper Download: https://www.examsegg.com/downloads/isro-ec-question-paper-2008.pdf

ISRO Previous Year Question Paper 2009:

Q 1. If a counter having 10 FFs is initially at 0, what count will it hold after 2060 pulses?
(a) 000 000 1100
(b) 000 001 1100
(c) 000 001 1000
(d) 000 000 1110

Q 2. A memory system of size 16 K bytes is required to be designed using memory chips which have 12 address lines and 4 data lines each. Then the number of such chips required to design the memory system is
(a) 2
(b) 4
(c) 8
(d) 16

Q 3. The purpose of a Cassegrain feed in a parabolic reflector antenna is to
(a) Achieve higher antenna gain
(b) Reduce the antenna size
(c) Reduce the beamwidth
(d) Ease of locating the feed at convenient point

Q 4. A moving coil iron ammeter may be compensated for frequency errors by
(a) Series inductance
(b) Shunt resistance
(c) Series resistor
(d) Shunt capacitor

Q 5. What is the approximate skin depth in copper at 100 MHz?
(a) 0.1 micron
(b) 10 microns
(c) 10 mm
(d) 100 mm

Q 6. While designing a low noise amplifier, what is the importance of the noise resistance of a transistor?
(a) It gives the effective impedance offered by the input with respect to noise current
(b) It defines the criterion for conjugate matching of input impedance
(c) It tells us the resistance that would generate the same amount of noise at room temperature
(d) It tells us how rapidly the noise figure increases as we move away from the optimum source impedance

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Q 7. Unattenuated radiation field at the surface of the earth of a quarter-wave monopoie will exist if the earth surface is
(a) Lossy dielectric
(b) Perfect insulator
(c) Perfectly conducting
(d) None of these

Q 8. Which of the following types of devices is not field programmable?
(a) FPGA
(b) ASIC
(c) CPLD
(d) PLD

Q 9. Which is the correct order of different process steps for a typical FPGA design?
(a) Functional simulation, Synthesis, Place & Route, Timing Verification
(b) Functional simulation, Timing Verification, Synthesis, Place & Route
(c) Timing Verification, Synthesis, Functional simulation, Place & Route
(d) Synthesis, Functional simulation, Timing Verification, Place & Route

Q 10. The theoretical dividing line between Reduced Instruction Set computing (RIS(C) microprocessor and Complex Instructions Set Computing (CIS(C) microprocessor is
(a) Instruction execution rate to be one instruction per clock cycle
(b) Number of address and data lines
(c) Number of pins in the chip
(d) None of the above

PDF Download: https://www.examsegg.com/downloads/isro-ec-question-paper-2009.pdf

ISRO Scientist/Engineer Electronics Paper 2010:

Q 1. When compared with stripline, the major disadvantage of microstrip line is
(a) Not amenable for printed circuit technique.
(b) More expensive and complex to manufacture.
(c) Bulkier and voluminous.
(d) More likely to radiate

Q 2. The disadvantage of single-stub matching as compared to double-stub matching, is that
(a) The stub position has to be adjustable
(b) Only shunt stub can be used
(c) Only resistive load can be matched
(d) Useful only in two wire transmission line

Q 3. If every minor of order V of a matrix ‘A’ is zero, then rank of ‘A’ is
(a) greater than ‘r’
(b) equal to ‘r’
(c) less than or equal to ‘r’
(d) less than ‘r’

Q 4. Which of the following is true
(a) The product of the eigenvalues of a matrix is equal to the trace of the matrix
(b) The eigenvalues of a skew-symmetric matrix are real
(c) A is a nonzero column matrix and B is a nonzero row matrix, then rank of AB is one
(d) A system of linear non-homogeneous equations is consistent if and only if the rank of the coefficient matrix is less than or equal to the rank of the augmented matrix

Q 5. The purpose of Design for Test (DFT) process in ASIC design flow is
(a) To capture functional errors
(b) To capture manufacturing defects
(c) To capture timing violations
(d) For radiation mitigation

Q 6. A parallel plate capacitor of 100 pf having an air dielectric is charged to 10 kilovolts. It is then electrically isolated. The plates are pulled away from each other until the distance is ten times more than before. Estimate the energy needed to pull the plates.
(a) 0.05 Joules
(b) 50 Joules
(c) 500 Joules
(d)-50 Joules

Q 7. How could Schroedinger’s equation be relevant in the practical design of a Cathode-Ray Tube?
(a) To optimize the colour quality
(b) To optimize the picture sharpness
(c)  It is not relevant, because the CRT contains no crystalline lattice structure
(d) Its effects are negligible, as the electron wavelength is very small compared to the spot size

Q 8. For CMOS implementation of 2 input XOR logic gate, how many nMOS and pMOS transistors are required?
(a) 2 nMOS and 2 pMOS
(b) 3 nMOS and 3 pMOS
(c) 6 nMOS and 6 pMOS
(d) 8 nMOS and 8 pMOS

Q 9. Which of the following parameters of a Silicon Schottky Diode is higher than that of a corresponding PN junction diode?
(a) Forward voltage drop
(b) Reverse recovery current
(c) Reverse recovery time
(d) Reverse leakage current

Q 10. A unit step voltage travels from left to right along an infinite transmission line. It hits an inductive discontinuity at t=0. What will be the waveform immediately to the left of the discontinuity?
(a) Positive spike on a unit step
(b) Unit step with reduced rise time
(c) Attenuated unit step
(d) Magnified unit step

ISRO EC Paper Download: https://www.examsegg.com/downloads/isro-ec-question-paper-2010.pdf

ISRO Previous Year Question Papers for Electronics 2011:

Q 1. In an amplitude modulated system if the total power is 600W and the power in the carrier is 400W, the modulation index is
(a) – 0.5
(b) 0.75
(c) 0.9
(d) 1

Q 2. The channel capacity under the Gaussian noise environment for a discrete memoryless channel with a bandwidth of 4MHz and SNR of 31 is.
(a) 20 Mbps
(b) 4 Mbps
(c) 8 kbps
(d) 4 kbps

Q 3. In satellite communication, frequency modulation is used because satellite channel has
(a) High modulation index
(b) Small bandwidth and negligible noise
(c) Large bandwidth and severe noise
(d) Maximum bandwidth and minimum noise

Q 4. For a 3-um-diameter optical fiber with core and cladding indexes of refraction of 1.545 and 1.510, respectively. The cut off wavelength is.
(a)  2.3um
(b)  1.29um
(c)  1.5um
(d)  3.24um

Q 5. A 12-bit ADC is operating with a lus clock period and total conversion time is seen to be 14us always. The ADC must be of the type
(a)  Flash type
(b)  Counting type
(c)  Integrating type
(d)  Successive approximation type

Q 6. In VHDL all the statements written inside a process statement are_________
(a) Concurrent
(b) Sequential
(c) Both (a) and (b)
(d) None of the above

Q 7. A microprocessor with 12-bit address bus will be able to access____kilobytes of Memory
(a) 0.4
(b) 2
(c) 10
(d) 4

Q 8. A practical current source is usually represented by
(a) A resistance in series with an ideal current source.
(b) A resistance in parallel with an ideal current source.
(c) A resistance in parallel with an ideal voltage source.
(d) None of the above

Q 9. The dominant mode in a rectangular wave guide is TEo, because this mode has
(a) No attenuation
(b) No cut off
(c) No magnetic field component
(d) The highest cut-off wavelength

Q 10. A signal nil (t) is band limited to 3.6 kHz and the three other signals m2(t), ni3(t) and m4(t) are band limited to 1.2 kHz each, and these signals are transmitted by means of TDM. Then, what will be the transmission bandwidth of the channel.
(a) 7.2 KHz
(b) 14.4 KHz
(c) 3.6 KHz
(d) 2.4 KHz

ISRO 2011 Question Paper Download: https://www.examsegg.com/downloads/isro-ec-question-paper-2011.pdf

ISRO Electronics 2012 Paper:

Q 1. 1 cm3 of pure Germanium at 20°C contains about 4.2 x 1013 atoms, 2.5 x l013 free electrons and 2.5 x l013 holes. 0.001% of Arsenic doping donates an extra 1017 free electrons in the same volume. The approximate number of holes in one cm3 in the doped semiconductor under equilibrium condition is :
(a) 6.25 x l09
(b) 2.5 x l09
(c) 10.5 x l09
(d) 1017

Q 2. Measurement of Hall coefficient enables the determination of:
(a) Temperature coefficient and thermal conductivity
(b) Mobility and concentration of charge carriers
(c) Fermi level and forbidden energy gap
(d) None of the above

Q 3. Silicon is not suitable for fabrication of light emitting diodes because it is :
(a) An indirect band gap semiconductor
(b) A direct band gap semiconductor
(c) A wide band gap semiconductor
(d) A narrow band gap serniconducto.r

Q 4. The band gap of elements arranged in ascending order is :
(a) Diamond, Ge, Si
(b) Si, Ge, Diamond
(c) Ge, Si, Diamond
(d) Diamond, Si, Ge

Q 5. The following statements are made for NMOS& PMOS
1.  The carrier mobility in NMOS is higher
2.  PMOS require less area than NMOS
3.  NMOS circuits are smaller than PMOS
4.  PMOS are faster in switching.
Of these, the true statements are :
(a)  2 and 4 only
(b)  2 and 3 only
(c)  1 and 3 only
(d)  1, 2 and 3 only

Q 6. Special handling precautions should be taken when working with MOS devices. The statement which is not true is :
(a) All test equipment should be grounde(d)
(b) MOS devices should have their all leads shorted together during shipment and storage.
(c) Never remove or insert MOS devices with the power on.
(d) MOS devices do not require grounding straps used for CMOS

Q 7. For Butterworth & Chebyshev filters, the correct statement is :
(a) Butterworth response has a sharp cut-off
(b) Chebyshev response has a flat response in the pass band
(c) Butterworth response has ripplesinthe pass band
(d) Chebyshev response has ripples in the pass band

Q 8. In a feedback series regulator circuit, the output voltage is regulated by controlling the
(a) Magnitude of the l/P voltage
(b) Gain of the feedback transistor
(c) Voltage drop across the series pass transistor
(d) Reference voltage

Q 9. In a fullwave rectifier circuit with centre tap transformer, if voltage between one end of secondary winding and centre tap is 300V peak, then PIV (peak inverse voltage) is
(a) 300 V
(b) 150 V
(c)   600 V
(d) 900 V

Q 10. If a right hand circularly polarised wave is incident on a perfect conductor. The reflected wave is:
(a) Right circularly polarised wave
(b) Left circularly polarised wave
(c) Linear polarised wave
(d) None of above

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